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Ordering number : ENA1376
Bi-CMOS LSI
LV5749V
Overview
1-channel Step-down Switching Regulator
The LV5749V is a 1-channel step-down switching regulator.
Functions
* 1 channel step-down switching regulator controller. * Load-independent soft start circuit. * ON/OFF function. * Built-in pulse-by-pulse OCP circuit. It is detected by using ON resistance of an external MOS. * Synchronous rectification. * Current mode control. * Synchronous drive by external signal.
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter supply voltage Allowable Power dissipation Operating temperature Storage temperature Symbol VIN max Pd max Topr Tstg Mounted on a specified board. * Conditions Ratings 45 0.74 -40 to +85 -55 to +150 Unit V W C C
* : When mounted on the specified printed circuit board (114.3 x 76.1 x 1.6mm), glass epoxy
Recommended Operating Range at Ta = 25C
Parameter Supply voltage range Error amplifier input voltage VIN Symbol Conditions Ratings 8.5 to 42 0 to 1.6 Unit V V
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D2408 MS PC 20081208-S00002 No.A1376-1/6
LV5749V
Electrical Characteristics at Ta = 25C, VIN = 12V
Parameter Reference voltage block Internal reference voltage 5V power supply Vref VDD Including offset of E/A IOUT = 0 to 5mA 0.654 4.7 0.67 5.2 0.686 5.7 V V Symbol Conditions min Ratings typ max Unit
Triangular waveform oscillator block Oscillation frequency Frequency variation ON/OFF circuit block IC start-up voltage IC off voltage Soft start circuit block Soft start source current Soft start sink current UVLO circuit block UVLO lock release voltage UVLO hysteresis OCP circuit block OCP charge current Error amplifier Input bias current Error amplifier transconductance Sink output current Source output current Current detection amplifier gain over current limiter circuit block Reference current 1 Reference current 2 Over current detection comparator offset voltage Over current detection comparator common mode input range PWM comparator Input threshold voltage (fosc = 125kHz) Maximum ON duty Output block Output stage ON resistance (the upper side) Output stage ON resistance (the under side) Output stage ON current (the upper side) Output stage ON current (the under side) The whole device Standby current Mean consumption current ICCS ICCA EN < 1V EN > 3.5V 3 10 A mA IONL 240 mA IONH 240 mA RONL 5 RONH 5 Vt max Vt0 DMAX Duty cycle = DMAX Duty cycle = 0% 0.9 0.4 80 1.0 0.5 85 1.1 0.6 90 V V % VIN-0.45 VIN V ILIM1 ILIM2 VLIM OFS MODE = L (GND) MODE = H (VIN) -10% -10% -5 18.5 37.0 +10% +10% +5 A A mA IEA IN GEA IEA OSK IEA OSC GISNS FB = 1.0V FB = 0V 1000 1400 -100 100 1.5 100 1800 nA A/V A A IOCP 5 A VUVLO VUVLO H 7.5 8.0 0.7 8.5 V V ISS SC ISS SK EN > 3.5V EN < 1V 4 5 2 6 A mA VEN on VEN off 2.5 1.0 3.0 1.2 3.5 1.4 V V FOSC FOSC DV RT = 220k VIN = 8.5 to 42V 110 125 1 140 kHz %
No.A1376-2/6
LV5749V
Package Dimensions
unit : mm (typ) 3178B
5.2 16 9
4.4
6.4
1 0.65 (0.33)
8 0.15 0.22
1.5max
SANYO : SSOP16(225mil)
Pin Assignment
0.1
(1.3)
FB 1 COMP 2 EN 3 RT 4
0.5
16 SS 15 ILIM 14 VIN 13 OCP
LV5749V
SYNC 5 SW 6 CBOOT 7 HDRV 8 12 MODE 11 GND 10 VDD 9 LDRV
Top view
No.A1376-3/6
LV5749V
Block Diagram
VIN 14 MODE 12 5A OCP 13 1.25V + OCP Comp1 + OCP Comp2 VCC OSP LOGIC 5V REGULATOR REFERENCE VOLTAGE UVLO
ILIM 15 MODE L 18.5A MODE H 37A 5A SD SS 16 FB 1 COMP 2 0.67V + + -
SQ R + Current Amp DMAX = 90% 1.0V 0.5V CONTROL Logic 5V 10 VDD 9 LDRV shut down(SD) 45 RT SYNC 3 EN 11 GND 7 CBOOT 8 HDRV 6 SW + PWM Comp
SAW WAVE OSCILLATOR Err Amp
Pin Function
Pin No. 14 Pin name VIN Power supply pin. This pin is monitored by UVLO function. When the voltage of this pin becomes 7.5V or more by UVLO function, The IC starts and the soft start function operates. 11 10 7 GND VDD CBOOT Ground pin. Each reference voltage is based on the voltage of the ground pin. Power supply pin for an external the lower MOS-FET gate drive. Bootstrap capacity connection pin. This pin becomes a GATE drive power supply of an external NchMOSFET. Connect a bypath capacitor between CBOOT and SW. 6 5 9 8 1 SW SYNC LDRV HDRV FB Pin to connect with switching node. The source of NchMOSFET connects to this pin. External synchronous signal input pin. An external the lower MOSFET gate drive pin. An external the upper MOSFET gate drive pin. Error amplifier reverse input pin. By operating the converter, the voltage of this pin becomes 0.67V. The voltage in which the output voltage is divided by an external resistance is applied to this pin. 2 COMP Error amplifier output pin. Connect a phase compensation circuit between this pin and GND. 16 SS Pin to connect a capacitor for soft start. A capacitor for soft start is charged by using the voltage of about 5A. This pin ends the soft start period by using the voltage of about 1.1V and the frequency fold back function becomes active. 15 ILIM Reference current pin for current detection. The sink current of about 18.5A flows to this pin when Low level (GND) is set to the MODE pin. Also, the sink current of about 37A flows to this pin when High level (VIN) is set to the MODE pin. When a resistance is connected between this pin and VIN outside and the voltage applied to the SW pin is lower than the voltage of the terminal side of the resistance, the upper NchMOSFET is off by operating the current limiter comparator. This operation is reset with respect to each PWM pulse. 3 13 EN OCP ON/OFF pin. Pin to set the time of the timer (during double the over current detection point) Connect a capacitor between this pin and GND. OCP charge current : 5A 4 12 RT MODE Pin to set the oscillation frequency. Connect a resistance between this pin and GND. Pin to switch the over current detection point. Set by the low level (GND) of the ILIM pin. Set by the high level (VIN) of the OCP pin. When this MODE pin is set to the high level and the point of the over current detection is set by using the ILIM pin is exceeded, the value becomes double the original value. Also, when the MODE pin is set to the low level, the point of the over current detection remains an original value. Description
No.A1376-4/6
LV5749V
Timing Chart When the MODE pin is set to the high level and the point of the over current detection is set by using the ILIM pin is exceeded, the value becomes double the original value. Also, when the MODE pin is set to the low level, the point of over current detection remains an original value. Timing chart of the over current detection point switching is as below.
t 1.25V OCP 0V over current detection point during High MODE current limit x 2A For example 6A current limit x 1A For example 3A
over current detection point during Low MODE Load Current
Setting Chart 1. Output voltage setting * Setting of the output voltage VOUT is as follows. R4 R4 VOUT = 1 + R3 x VREF = 1 + R3 x 0.67(typ) [V] 2. Soft Start setting * Setting of capacitor C5 is as follows. Iss x Tss 5 x Tss C5 = V = 0.67 [F] REF Iss : Charge current value. Tss : Soft Start time 3. OCP Timer setting * Setting of OCP timer capacitor C11 is as follows. 5 x Tocp Iocp x Tocp [F] C11 = Vocp comp1 = 1.3 Iocp : Charge current value. Tocp : OCP time 4. Current limiter setting * Setting of the current limiter set resistance R5 is as follows. R5 = Rdson x IL max Rdson xIout = [] Iilim 18.5 Iilim : ILIM current value. IL : inductance current value Rdson : ON resistance value between Q1 drain-souces.
No.A1376-5/6
LV5749V
Sample Application Circuit
VIN = 12V C1 10F/ 25V x 2 C7 0.1F/ 25V R5 12k C6 1000pF C2 1F Q1 MCH6406 R100 10 D1 DSE010 R101 10 L 33H Q1 MCH6406 R4 10k VOUT = 5V
SYNC H/L ON/OFF SS
14 VIN 5 SYNC 12 MODE 3 EN 16 SS 2 COMP
15 ILIM CBOOT 7 HDRV 8 SW 6 LDRV 9 FB 1
C5 0.1F
R2 1.0k C3 0.1F
C12 OPEN C9 10F x 2
C10 OPEN
C4 OPEN
4 RT R7 240k
10 V GND OCP DD 11 13 C11 680pF
C8 1F
R3 1.5k
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This catalog provides information as of December, 2008. Specifications and information herein are subject to change without notice. PS No.A1376-6/6

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